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Engineers commonly model the output of a digital-to-analog converter with a zero-order hold that keeps each sample value constant for the duration of one sampling interval.
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Engineers commonly model the output of a digital-to-analog converter with a zero-order hold that keeps each sample value constant for the duration of one sampling interval.
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Related words
zero-order hold
Noun
Japanese Meaning
数学におけるモデルで、従来のデジタル‐アナログ変換器が行う信号再構成の手法を表す。離散時間信号の各サンプルの値をそのサンプル間隔分、一定期間保持することで連続時間信号へ変換する過程を記述している。
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